Floor 4 — Von Neumann: The Architecture That Chose the Bus

The floor

In June 1945, John von Neumann circulated First Draft of a Report on the EDVAC. It sketched an architecture: a central processing unit, a memory that stored both data and instructions, a single bus connecting them. Fetch an instruction, decode it, execute it, fetch the next one. A sequential heartbeat.

This is the machine you are reading this on. Every laptop, every phone, every server farm. The "von Neumann architecture." For eighty years it has been the only way to build a general-purpose computer that anyone took seriously.

What was picked

Serial execution. A single shared memory. Program as data.

The choice was pragmatic. Vacuum tubes were expensive. Wiring was expensive. A machine that did one thing at a time could be built with fewer of each. A machine that stored its program alongside its data could be reprogrammed without rewiring. These were real engineering wins at a moment when every decision had to survive a welding iron.

The architecture is also narrow in a very specific way. The CPU can only look at one thing at a time. The memory can only be read from one place at a time. Every computation has to be squeezed through this single narrow passage — what Backus would later call, with more frustration than the field has ever fully processed, the von Neumann bottleneck.

We built an entire science of computing that assumes a bottleneck. Then we named every problem that doesn't fit through the bottleneck as a "parallelism challenge."

What could have been picked

Von Neumann himself knew there was another way. In the same years he was writing the EDVAC report, he was also writing about cellular automata, about self-reproducing machines, about brain architectures whose state was spread across every component at once. He wrote The Computer and the Brain in the last year of his life. He was, by the end, openly wondering whether his own architecture was a mistake.

Meanwhile, the analog computer was still the fastest machine on Earth for wide classes of problems. The ENIAC's digital cousins were slower at solving differential equations than the mechanical differential analyser at MIT — and would be for another decade. The neuromorphic engineers of the 1960s and 70s built chips whose transistors operated in the subthreshold regime, holding graded voltages, computing by physics rather than by instruction. Those chips ran on microwatts.

The fork here is strange, because the alternative was not only available — it was sometimes winning — and the field moved away from it anyway. The bus-and-register model was easier to program, easier to verify, easier to teach. The continuous, parallel, settling model was harder to get a PhD with.

So here we are.

What we missed

A machine whose state is not a sequence of register values but a field across the substrate does not have a bottleneck, because it does not have a pipe. It has a surface. Its work is not a sequence of instructions; it is the physical settling of the whole system toward equilibrium. Ask it a question by imposing a boundary condition; read the answer by looking at where it settles.

Imagine the carbon cost of the alternate timeline. The giant warehouses of bus-bound silicon, doing one fetch at a time, heating the North Atlantic — against a palm-sized chip holding its computation in its own physics, answering the same question with a thousandth of the energy, because the answer is what the material does naturally.

That machine exists. Neuromorphic researchers have been building it, quietly, at Stanford and Manchester and IBM, for decades. It gets covered as a curiosity every few years and then forgotten again.

The bus won because the bus was legible. Legibility is a real virtue. But so is thermodynamics, and thermodynamics is coming for the bill.

What the next floor will ask

If the machine is a bus, what does information even mean?

That's Floor 5.